1. Field Of the Invention
The present invention relates to a system which modifies asynchronous data for high speed transmission along media. More particularly, this invention is intended for use in local area networks or wherever it is necessary to sample and retime asynchronous data.
2. Discussion of the Prior Art
Local area networks which permit digital data communications between personal computers, printers and similar data stations, are commonly used in offices, factories and other locations. These networks allow digital data communications, typically over coaxial cable or twisted pairs of transmission lines, between different computers and associated peripheral work stations at spaced locations within the office or factory facility.
The two most popular methods of transmitting and receiving data in local area networks in use today are the asynchronous method and the synchronous method. The most common asynchronous method is known as the Universal Asynchronous Receiver/Transmitter circuit (UART), while the most popular synchronous method utilizes Manchester Encoded transmitted data and Phase-Lock Loop (PLL) circuits. A disadvantage associated with these two methods is their respective limitations at high frequency data rates.
A UART circuit converts data from a parallel format to a serial format for transmission over a communications line. The UART requires clock frequencies of sixteen times that of the data rate. The method used by the UART to sample the Received Data (RD) using clock frequencies 16 times higher than the data bit rate is this: when the RD changes from a Mark to a Space (a Mark being a high and a Space being a low), a spike detection circuit in the UART counts eight clocks of the 16X clocks (one-half a bit time), then samples the data again to determine if the line is still in the low state. If the RD is still low the bit is considered a valid Start bit. This condition enables a counter in the UART which divides the 16X clock by 16 to produce a sampling clock at the center of each bit time.
The received data bits, the Mark and Space, are also known as Stop and Start bits respectively. A data word consists of one Start bit, five to eight character bits, one parity bit and one, or one and a half, Stop Bits. The UART is seldom used at frequencies above 1 MHz which is due to the high frequency system clock requirement of the 16X clocks. A UART designed with this philosophy would require a 16X clock frequency of 320 MHz to transfer data at a 20 MHz data rate.
The synchronous method, on the other hand, requires a forced mid-bit transition to convey the inherent timing information of the data. In the synchronous method, the clock defines the transmission time for the data, such that the frequency of the data be equal to that of the transmitter clock. Start and Stop bits for each character are not needed in the synchronous system, providing greater transmission band width for message bits.
At the present time the most popular commercially available asynchronous serial single line local area network operating at frequencies above 2 Mbits/second is manufactured and sold by Datapoint Corporation under the trademark ARCNET. Existing ARCNET Topology permits data transfer rates of 2.5 Mbits/second, wherein data is transmitted within a 400 nanosecond time interval on a 5 Mhz sine wave followed by a 200 nanosecond silent period. Recently, improvements of the ARCNET topology have resulted in a local area network having a transmission frequency of 20 Mbits/second. This topology is also manufactured and sold by Datapoint Corporation and is known as Arcnetplus. According to Datapoint this substantial improvement was made possible by a more efficient use of the 400 nanosecond interval during which time data bits are transmitted. This more efficient use of the 400 nanosecond time interval is accomplished adopting a combination of amplitude and phase modulation. With the use of high speed digital to analog convertors each encoded 4 bits/baud on the 5 Mhz carrier is assigned a voltage and a phase. There are eight distinct voltages and two distinct phases of this 5 Mhz carrier to combine for a weight of eight digital data bits for a 400 nanosecond transmission period. By eliminating the silent duration and maintaining the 5 Mhz carrier, Arcnetplus Topology can transmit data at the 2.5 Mbits/second to Arcnet nodes or 20 Mbit/s to Arcnetplus nodes. However high speed digital to analog converters are not very cost effective at the present time.